Vollständiger Abstract
Worum geht es in dieser Arbeit?
Abstract A linear 12‐bit segmented digital‐to‐analog converter (DAC) has been designed for LCD driver ICs. The proposed architecture consists of three 4‐bit sub‐DACs and a switched‐capacitor adder. It requires only 48 references out from conventional 4096 resistor‐string taps, and the overall area of the DAC is reduced significantly without power consumption penalty.
Bibliografischer Nachweis
Publikationsdaten
- Autor:innen
- Shu‐Chuan Huang, Chun‐Hsien Chou, Chi‐Neng Mo, Shih‐Meng Chang
- Quelle
- SID Symposium Digest of Technical Papers
- Publikation
- 2009-01-01
- Band / Ausgabe
- Nicht angegeben
- Seiten
- Nicht angegeben
- ISSN / ISBN
- 0097-966X, 2168-0159
- Zitationen
- 1 laut Crossref
- Referenzen
- 0 hinterlegt
Zitieren
Zitierfähiger Nachweis
Shu‐Chuan Huang, Chun‐Hsien Chou, Chi‐Neng Mo, Shih‐Meng Chang (2009). P‐41: An Area‐Efficient 12‐Bit Segmented DAC for LCD Driver ICs. SID Symposium Digest of Technical Papers. https://doi.org/10.5712/rbmfc21%2848%294096
Kontext
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